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  8-94 parallel digital output lsb b1112 1-6H005 12-bit aid converter itac hybrid technology features ? - 55c to + 200c specifications ? 50 psec maximum conversion time ? no missing codes over full temperature range ? complete with internal clock and reference voltage ? serial output data available ? ttl and +5v cmos compatible ? hermetic package ? low power operation with external reference (250mw) ? pin compatible with burr brown adc10ht description the 1-6hoos general purpose, 12-bit, successive approximation no converter is ideally qualified for circuits that must operate over wide temperature ranges. the 1-6hoos incorporates state-of-the- art ic and laser-trimmed components. it is complete with an internal clock and reference voltage. internal scaling resistors allow bipolar input voltage ranges of sv and 10v. a pin is provided for serial output data. the 1-6hoos is contained in a compact, dual-width, 28-pin hermetic oil package and is fully pin compatible with the burr brown aoc10ht. 100% screened versions available upon request. refer to table lion the back page for example. ~ interfet ~,(214) 487-1287 fax (214) 276-3375 bll hl .j ~ r----l @ serial out @ -15vdc s1w1y @ + 15vdc supply @ refout+10v @ analog common @ 20vrange @ 10vrange @ bpolar offset @ convert command @ status @ clodl out ? refln @) clodl rate @ +5vdcsiwiy 12-bit successive approximation register (sar) 151 t 0.610 typ. (15.49) typ. ________ ---:1....;.:4 1 _ 1.395 (35.40) seating plane 1.465 (37.21) 0.025 (0.63) 0.135 (3.40) 0.009 (0.23) --ii-- 0.065 (1.65) 0.065 (1.65) 0.205,(5.21) 0.012 (0.30) leads in true position within 0.010 0 ? pin numbers for reference only. numbers may not be marked on the package. ~\
--ii-- --i i-- --i 1_ 0.015 (0.38) 0.100 typ. 0.025 (0.63) 0.020 (0.50) (2.54) typ. 0.065 (1.65) f 0.150 (3.80) 0.195 (4.95) ;~
--i i-- 0.600 typ. (15.24) typ.
8-94 itac hybrid technology table ii - 100% device screening i test screen i method i conditions 1-6H005 12-bit aid converter 1. precap internal visual 2017 2. high temperature storage 1008 conditions c, t a = 150c. time = 24 hours minimum 3. temperature cycling 1010 condition c, -65c to + 150c, 10 cycles 4. constant acceleration 2001 condition a, 5kgs, y, and y 2 axis only. 5. fine leak 1014 condition a 6. gross leak 1014 condition c 7. interim electrical test - optional 8. burn-in 1015 condition b, time = 160 hours minimum. ta = +5c, vcc = 5.5v, if = 20ma, id = 25ma. 9. final electrical test - group a, subgroup 1, 10% pda applies. group a, subgroup 2, 3, 9. 10. external visual 2009 ? refers to screening as defined in mil-h-38534.lnterfet is not certified and does not imply certification by referencing these methods. timing diagram 1--------- maximum throughput time 2 ------------1 conversion time status (eoc) ~ (msb) bit 1 (0) ,'---- _ bit 4 (0) l...-.. ----lr-- bit 5 (0) ----------, r-- bit 2 (1) bit 3 (1) bit 6 (1) bit 7 (1) bit 8 (1) bit 9 (0) l.- --'r- serial data out 3 bit number e == l----.j 1 (msb) 1100 2 3 4 5 1 6 110 11 l----.j 7 8 9 10 11 0 l----.j 12 (lsb) - - bit 10 (1) bit 11 (1) (lsb) bit 12) (0) notes: 1. the internal clock runs continuously. the convert command must go low at least 80 nsec before the rising edge of any clock pulse to initiate a conversion, and must return high at lease 80 nsec before the next low to high clock transition. 2. the maximum throughput time is 54 ~sec for 12 bits. 3. if serial data is strobed, use the trailing edge of the clock. during data conversion, the determination a interfet as to the proper state of any bit (bit lin") is made on the rising edge of the clock pulse and the parallel output data is considered valid at the negative edge of the clock cycle (actually valid following the clock ~,(214) 487-1287 low to high transition). the serial output then is clocked at the next clock cycle, thus it will recolre 13 fax (214)276-3375 clock steps to obtain the correct serial 12 bit data. thus valid serial data is provided at clock "nil + 1.
1-6H005 12-bit aid converter 8-94 itac hybrid technology electrical characteristics i conditions i min 1,-----;-t_y_p..,.,.------':-i_--:-m_a:-x_--'--- table 1. specifications at rated power supply voltages and t a = +25c unless otherwise noted. i resolution i i 12 1 1 input units bits _ _ analog - 55c to + 200c voltage ranges unipolar o to + 10to + 20 v bipolar 5, 10 v impedance (direct input) o to 10v, 5v 5 k.q o to + 20v, 10v 10 k.q digital1 - 55c to + 200c convert command logic loading 1 cmos load transfer characteristics - accuracy
gain error 2 0.05 0.2 % offset error 3 unipolar 0.o5 0.2 % of fsr3 bipolar 0.05 0.2 % of fsr linearity error 0.012 % of fsr inherent quantization error 1/2 lsb differential linearity error 0.012 0.024 % of fsr total unadjusted error4 + 25c 0.10 oa % of fsr - 55c to + 200c 0.30 1 % of fsr total adjusted error 5 + 25c 0.006 0.012 % of fsr - 55c to + 200c 0.2 o.,p % of fsr total unadjusted error6 + 25c 0.1 oa % of fsr exclusive of reference - 55c to + 200c 0.2 0.8 % of fsr total adjusted error? + 25c 0.006 0.012 % of fsr exclusive of reference - 55c to + 200c 0.15 oa % of fsr i conversion time 30 50 u sec gain with internal reference 15 35 ppm/oc gain exclusive of reference 5 10 ppm/oc offset unipolar 2 ppm of fsr/oc offset with internal reference bipolar 10 35 ppm of fsr/oc offset exclusive of reference bipolar 4 1 ppm of fsr/oc linearity 0.5 1 ppm of fsr/oc no missing codes over temp. range - 55c to + 200c 12 bits ~? interfet ~,(214j? 487-1287 fax (214j 276-3375
8-94 1-6H005 12-bit aid converter ilac hybrid technology electrical characteristics i conditions i min i typ i max i units table 1. (continued) specifications at rated power supply voltages and t a = +25c unless otherwise noted. output - digital data r parallel output codes b unipolar sb bipolar 9 ob,tc parallel output drive 1 lstrl loads serial data code (nzr) - sb, ob serial output drive 1 lstrl loads status logic "1" during conversion status output drive 1 lstil loads internal clock - output drive 1 lstrl loads internal clock - frequency 400 khz power supply & reference
rated voltage vcc 14.5 15 vdc vdd 4.75 5 vdc supply drain + vcc +15 ma -vcc -30 rna vdd +16 rna power supply sensitivity vcc 0.01 0.10 % of frs/% vcc vdd 0.01 0.10 % of frs/% vdd internal reference voltage 9.990 10 10.010 v max extemal current with no degradaton of specs 2 . rna temperature coefficient 10 ppm/oc temperature range i operating + 200 storage + 200 notes 1. + 5v cmos compatible. input current (low to high) = 1 ~a max. use pull-up resistor when driving convert command from m. 2. adjustrable to zero. 3. fsr means full scale range. for example, connected fora 1 ov has a 20v fsr. 4. includes gain, offset, and linearity errors (bipolar mode). 5. gain, offset, errors removed at + 25c (bipolar mode). 4. includes gain, offset, and linearity errors with external + 10v 1 mv reference; does not include reference drift (bipolar mode). 5. gain, offset, errors removed at + 25c with external + 1 ov 1 mv reference; does not include reference drift (bipolar mooe). 8. sb - straight binary; ob - offset binary; tc - two's complement. 9. tc cooing obtained by useing msb - pin 13 - instead of msb - pin 12. ~ interfet ~, [214)487-1287 fax [214) 276-3375


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